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Work Background
Program Director
AvernobleProgram Director
Jan. 2018Regional and Global Corporate Training , Marketing , Planning , Learning and Development Framework Design
Business Owner
Smart Reader WorldwideBusiness Owner
Oct. 2013Kuala Lumpur, Federal Territory of Kuala Lumpur, MalaysiaManaging Operations of of the Medan Idaman branch of Preschool as franchisee -including planning, staffing ,materials, finance ,and marketing
Managing Director
TFG Bliss Innovations Managing Director
May. 2013Kuala Lumpur, MalaysiaRegional and Global Corporate Training , Marketing , Planning , Learning and Development Framework Design
Staff Engineer
Intel CorporationStaff Engineer
Apr. 2009 - May. 2013Submitted 3 US Patents , 2 published https://www.google.ch/patents/US20140118026?hl=de&cl=en https://www.google.ch/patents/CN103793356A?hl=de&cl=en  Chairperson of Altera Technical Symposium worked with global team of technical IEEE Fellows, managers and directors or organize, manage and coordinate a world class symposium which includes technical paper submission, presentation, judging system, 2 days of world class presenters  Featured in MalaysiaTalentCorp’s Article as Altera’s Women Engineering Ambassador http://talentcorpbucket.s3-website-ap-southeast-1.amazonaws.com/assets/contentms/img/template/editor/themes/agenda/TalentCorp-EnE-Brochure.pdf  Involved in the pre-and post silicon validation and verification works for new high-speed FPGA & Custom Logic devices. Heavily involved in product launching and technical analysis.  Develop & implement the Design-for-Characterization features in new product design and global rollout for cost cutting.  Design test chip for Custom-Logic (Hardcopy) verification and characterization. Design test benches and undertake pre-silicon verification (Verilog codes).  Analyze verification failures & aid in debugging logic designs.  Manage the verification schedule, create final verification/characterization reports, present findings to internal teams and publish the reports to customers.
Snr IC Design Engineer
MarvellSnr IC Design Engineer
May. 2006 - Mar. 2009
Snr IC Design Engineer
Agilent TechnologiesSnr IC Design Engineer
Oct. 2003 - Dec. 2006
IC Design Engineer
Agilent TechnologiesIC Design Engineer
Jan. 2001 - Oct. 2003
Research Intern
MIMOS BerhadResearch Intern
Oct. 1999 - Dec. 1999
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