National Semiconductor (West Jordan, Utah)Section Manager, Staff Process Engineer
May. 1983 - Aug. 1996Daily LEAN and Quality Control operations planning, budgeting (scrap and waste), resource allocation, performance monitoring for 24 hours a day cleanroom fabrication are producing CMOS, NMOS, BiPolar, Discrete and Memory devices < 0.5 micron products. Section included process engineering, process technicians, direct labor supervisors equipment operators for material handling and WIP control, including non-complaint materials. Semiconductor wafer processes: diffusion, thin films, ion implantation, CVD, wafer thinning, PECVD passivation, dielectric deposition, SOG and wet chemical pre-cleans, etch, plasma strip. Staff Process Engineer supplying quick turnaround Operations Research with discrete event simulation and stocastic modeling for cycle time analysis across entire equipment set of high mix 24x7 semiconductor wafer fabrication area. Site Statistical Coordinator implementation of Real Time Statistical Process Control methods including highly automated control charts with corrective action protocol that ensured root cause analysis followed containment actions leading to implementation of preventative procedures to improve process capability and Quality Control certifications including ISO9001, QS9000 and automotive customer audit requirements. Recognized as site 'super user' of MES system implementation for process / equipment control schemes. Lead process engineer coordinating an 'on the fly' conversion of MES facilities for >50,000 wafers on >140 routes with >7000 unique operations across > 200 tools with ZERO misprocesses.