remoteIndependently handle complete verification of the core mixed signal module using a bottom-up approach
Created testbench (simulator/regression setup + connectivity) and verification environment for the digital top with several custom made UVCs (including register model and communication protocol)
Created testbench (simulator/regression setup + connectivity) and verification environment for the...
remoteCheck design fixes functionality and develop verification items to cover new requirements at top level using a UVM verification methodology.
Debug regression and investigate or fix issues.
Analyze functional and code coverage and implement items to fill holes
Apply coding rules and guidelines and contribute to code reviews
Generic target design examples: analog fault monitoring, design for te...