Trust Score
Trustworthy; active professional engagement.
Aliaksei's Career Path
Oct. 2018 -Present
SiFivePrincipal Engineer
San Mateo, CABuilding future HDL IR and compiler infrastructure github.com/llvm/circt. Developed format for capturing integration intent with reusable IP blocks, models, interfaces, registers; and SoC tools: github.com/sifive/duh. Developed DSP library, code generation and profiling tools for RISC-V Vector processor. Work in RISC-V foundation technical groups.
Jan. 2018 -Oct. 2018
Signal Laboratories, Inc.Principal Engineer
Menlo Park, CAArchitecture, design and RTL implementation of wireless baseband processor based on RISC-V architecture and custom instruction extensions; coarse grain reconfigurable systolic datapath optimized for complex DSP workload. Development of new distributed MIMO multicarrier wireless PHY algorithms, implementation in GnuRadio, Octave, C, ASM. RF design and prototyping including antennas and helical...
Apr. 2014 -Jan. 2018
ArterisSW Director, Principal Engineer
Campbell, CALeading software development team in design of configuration and generation tool for heterogeneous cache coherent SoC interconnect IP. Development of customer facing Web UI, tools and libraries. Developed new high-level Hardware Description Language, compiler and tools. NoC performance modeling framework in C++.