Evangelos Logaras

Senior IC/FPGA Digital Design Engineer @ublox

Computer engineer🧑‍🔬 EngineerElectrical engineer

My name is Evangelos Logaras, I live in Greece (Athens) and I hold a MSc and PhD in Microectronics digital system design. I also have more than 10 years of experience in the semiconductor industry (NXP, Infineon, u-blox) in digital design/verification both for FPGA/ASIC implementations, using VHDL/Verilog/SystemVerilog. I also have a lot of experience in Vivado-Vitis based design projects targeting Xilinx Zynq and Kintex Ultrascale based FPGAs. I also have hands-on experience in digital design verification using direct and formal functional tests or simulations on placed/routed design for timing closure. You may also check my profile on LinkedIn: https://www.linkedin.com/in/evangelos-logaras-5066a037/ I have worked on several FPGA design projects for several Xilinx platforms (Spartan, Kintex, Zynq architectures) on both hardwired state machine based designs or CPU based design with ARM and Microblaze cores. Lately I have worked with a customer to implement readout logic on FPGA for an ir optical sensor (developed by Alpha Core) targeting military applications. I have worked for several FPGA based projects. I have a lot of experience with many high speed comm. protocols, e.g. USB3.0, Gigabit Ethernet and optical based protocols like SpaceFiber. You may check a recent publication of mine for a research project funded by the European Space Agency, related to satellite image compression. https://zenodo.org/record/7311479#.Y-VXOHZByUk

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